Figure 4 shows the error in temperature measurement as a function of applied temperature for both designs in the measured samples presented in Figure 3. Measurement inaccuracy versus temperature for three different chips in both PTAT designs. These results show that the resistor based PTAT circuit is a good temperature sensor for temperatures ranging from K till K, though it is power consuming. The circuit measured power consumption at room temperature is 0.
To perform thermal transient analysis, a numerical integration method such as the backward Euler is required [ 20 ]. To solve the thermal transient analysis problem, one can model the thermal system as an equivalent RC circuit. Then, a SPICE-like simulation technique can be applied to the equivalent RC circuit to provide the thermal transient response [ 20 , 21 ]. The standard MOSFET models were changed to include a parameter describing each device specific temperature rise above the simulated ambient temperature, i.
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The transient simulation results are presented in Figure 5 for both PTAT designs and two temperature profiles: a graduate and a step temperature change. Simulated time response to a graduate local temperature change a , c and to a step change in local temperature b , d for both PTAT designs. It can be easily concluded that both PTAT designs follow the temperature changes accurately and without delay, meaning that the time response of the circuit is much smaller than chip thermal time constants.
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The time response of each design is obtained by simulating a step change in the sensor local temperature and the results are presented in Figure 5 b,d. Time constants of ns and ns were calculated for the resistor and diode based designs, respectively. We previously proposed to determine the chip local temperature by measuring the transistor threshold voltage [ 14 ].
Subsequently, by monitoring the changes in V t under actual operation, the true local temperature of devices can be determined. This was done by using a V t extractor circuit [ 23 , 24 , 25 , 26 , 27 ]. A V t extractor is a circuit that extracts the threshold voltage of a MOS device according to the device local temperature [ 23 ].
The architecture for a V t extractor circuit which we have chosen to implement is based on [ 28 ].
We chose this design because it combines a simple low voltage V t extracting block and feedback, to achieve independence of the output from the supply voltage, low current consumption therefore, low consumption , accuracy of the extracted threshold voltage toward supply voltage variations and transistor mismatch.
The tested extractor is presented in Figure 6 and consists of three blocks: i a simple V t extracting block; ii an offset generator; and iii the current feedback loop. In order to compensate for channel length modulation, mobility reduction and transistor mismatch the following feedback to the V t extractor block V in is needed [ 23 ]:. In the attempt to implement the feedback shown in Equation 8 , an offset should be added to V out. Hence, V gon includes the necessary offset from V out. Transistors M9 and M4 in Figure 6 are 5 and 4 times wider than M2, respectively, and due to the current mirror formed by M10 and M11, V gon is fed back to V s as follows:.
The capacitor in the offset generator block is used to prevent parasitic oscillation and noise disturbances during transient. The V t extractor voltage was measured at several nodes, see Figure 6 , in temperatures ranging from K to K. The measured output voltage is compared to circuit DC simulations, the nominal threshold voltage obtained from BSIM4 MOSFET [ 17 ] models and process thermal characterization in order to determine the sensors accuracy. In addition, process corner simulations were run to predict linearity robustness over process variations compared to typical operation.
Figure 7 shows the measured and simulated temperature dependence of the V t extractor circuit voltages V out , V in and V gon for three different samples from K to K. Comparison of the measured and simulate V t extractor circuit different voltages a Vout and V t b measured V out for three different chips c V in and d V gon. To evaluate the linearity of the V t extractor circuit the coefficient of determination R 2 [ 18 ] has been used like in the PTAT sensors case. At high temperatures, the increase in the excess voltage V off can cause nonlinearity in the temperature sensing capability of the V t extractor circuit due to the offset created between the desired feedback, as indicated in Equation 8 , and V in.
The measured sensor sensitivity given by the slope of V out vs. T shown in Figure 7 a is 2. There is a good correspondence between all measured and simulated results for all sampled circuit voltages V out , V in and V gon , as shown in Figure 7 a—d. The corner analysis demonstrates that the maximum temperature error due to process variations occurs for the SS corner and caused a maximum offset of 25 mV in the circuit output voltage. In addition, as seen in Figure 7 b, there are minor variations between the different measured samples which verifies the robustness, independence of the output voltage upon transistor mismatch and repeatability of this design.
Accordingly, the error in temperature is estimated by:. Figure 8 shows the temperature error as a function of applied temperature for three different chips. After applying common-centroid and other matching techniques in the layout the maximum error due to offset is 1. At the low end of the temperature range near room temperature, the error is much less, around 0. In future design, offset cancellation techniques such as chopping and auto-zeroing can be applied to further reduce the effect of offset on the sensor accuracy and improve the performance.
The time response of the V t extractor circuit was simulated under the same conditions graduate and step change in temperature as the PTAT and the results are shown in Figure 9. Figure 9 a present the V t extractor response to a graduate temperature change and it can be easily seen that the sensor follows the temperature changes accurately and without delay; meaning a decrease in the output voltage when temperature increases and vice versa during the chip cool down. Simulated time response to a a graduate local temperature change and to a b step change in local temperature.
The time response of the sensor is obtained by simulating a step change in the sensor local temperature and the results are presented in Figure 9 b. A Time constant of ns was calculated from this simulation. All sensors exhibit linearity and high sensitivity over the entire temperature range. However, the lateral diodes based PTAT design is inaccurate due to diode mismatches caused by the dependence of the saturation current upon diode dimensions. A resistor based PTAT has good accuracy but requires high power consumption during operation.
The PTAT circuit is best utilized when implementing temperature independent current or voltage sources Band Gap References , although a carful calibration is needed. A performance comparison between the sensors reported in this paper and the recent on-chip temperature sensors is shown in Table 1.
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As evident, the V t extractor circuit presented here is smaller than most reported sensors and has low power consumption while achieving good accuracy with no need in additional calibration. The circuit will be useful as a temperature sensor in high-performance analog, mixed-signal, and digital ICs due to its high performance and low power consumption.
Other applications for this temperature sensor are IR sources or detectors and new generation of smart sensors, like gas sensors, where temperature monitoring is necessary to achieve better sensitivity and selectivity in presence of different gases [ 6 ]. The help of Ida Shumpei from Murata in the transient simulations is highly appreciated.
The work presented in this paper was a collaboration of all authors. National Center for Biotechnology Information , U. Kind code of ref document : A2. Method and system for real-time estimation and prediction of the thermal state of a microprocessor unit. USB2 pt.
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